The present invention relates generally to methods and apparatus for reducing noise bandwidth in a wireless communication receiver. In preferred embodiments, the invention is a GSM receiver including a channel select filter, analog-to-digital converter, digital filter, and circuitry (operable during synchronization with a transmitter) to reduce the effective combined pass band of the channel select and digital filters, thereby reducing noise bandwidth during synchronization.
In many contexts in which a signal is received after propagating over a transmission link, the receiver is typically implemented in one of two ways. In one such receiver implementation, the received signal is bandpass filtered, then undergoes frequency conversion followed by analog-to-digital conversion and digital filtering (including digital bandpass filtering to reduce noise), and then undergoes a sequence of further processing operations (at least one of the operations being performed on different frequency band of the filtered digitized signal than is another of the operations). In the other receiver implementation, the received signal is bandpass filtered, then undergoes analog-to-digital conversion followed by frequency conversion, decimation and digital filtering (including digital bandpass filtering to reduce noise), and then undergoes a sequence of further processing operations (at least one of the operations being performed on different frequency band of the filtered digitized signal than is another of the operations).
For example, in typical wireless communication systems a receiver performs filtering (including channel selection) on a received signal, thereby generating an intermediate signal. The intermediate signal is a modulated signal (e.g., a signal modulated by Gaussian minimum shift keying) which must undergo further demodulation to extract its information content. Typically, the intermediate signal undergoes down conversion to the baseband followed by analog-to-digital conversion. The resulting digitized signal is then digitally filtered to reduce noise (thereby generating a filtered digital signal) prior to further processing (e.g., demodulation). If the received signal (and thus the filtered digital signal) is time-division-multiplexed (its data being contained in a specific time slot relative to the start of each frame transmitted by the transmitting system), the receiver must perform an initial synchronization operation in which it processes an initial portion of the filtered digital signal so as to synchronize itself with the transmitting system. Typically, the synchronization frames of the filtered digital signal contain a tone of known frequency which the receiver must lock onto in order to perform the synchronization. After the synchronization has been completed, the receiver enters a mode in which it demodulates the normal transmitted data of the filtered digital signal.
One conventional type of TDMA (time division multiple access) wireless communication system is the GSM system, which uses both FDMA (frequency division multiple access) and TDMA. In a GSM system, each signal is transmitted in a selected frequency channel (the carriers being spaced 200 kHz apart from each other) in the range from 880-915 MHz (for transmission) to 925-960 MHz (for reception). Eight users can share each frequency channel, since eight time-domain-multiplexed channels are transmitted within each frequency channel. Each transmitted signal comprises frames of data. The users that share a single frequency channel access different non-overlapping time intervals of each frame transmitted in that frequency channel (in round-robin fashion). Thus, each receiving system includes a bandpass filter to select a frequency band, as well as synchronization circuitry (for synchronizing with the transmitter) so that the receiving system can select the proper time slot of the time-domain-multiplexed signal in the selected frequency band.
FIG. 1a is a block diagram of a portion of a receiver of a conventional GSM wireless communication system. In the GSM receiver of FIG. 1a, the signal received by filter 1 (which has been transmitted over a wireless communication link) has a carrier frequency in the range is 925 MHz to 960 MHz. The received signal is bandpass filtered in filter 1, amplified in low-noise amplifier 2, and again bandpass filtered in filter 3. The signal is then mixed (in RF mixer 6) with an RF signal (from voltage controlled oscillator 5) having frequency much lower than the 925-960 MHz carrier frequency, and the resulting intermediate frequency signal is bandpass filtered in channel select filter 7. The pass band of filter 7 is centered so that filter 7 selects a particular one of the GSM carrier frequencies (which as noted above are spaced 200 kHz apart from each other), and has width A, where A is less than 200 kHz but much greater than. 67 kHz.
The output of filter 7 is amplified in IF buffer amplifier 8, and then undergoes IF image rejection processing in mixer 10 (which receives an intermediate frequency signal from voltage controlled oscillator 9) and bandpass filtering (for antialiasing) in bandpass filter 11. The analog signal output from filter 11 is amplified in variable gain amplifier 12, and then digitized in analog-to-digital converter 13 (which is typically a sigma-delta analog-to-digital converter).
The digital signal output from A-to-D converter 13 then undergoes mixing in mixers 14 and 15, to generate an in-phase component I and a quadrature component Q (each of the components I and Q having a sample rate higher than the standard GSM data rate of 270.8 kb/sec). Mixer 14 typically mixes the output of converter 13 with a signal proportional to sin(xcfx80t/2T), where 1/T is equal to four times the second intermediate frequency, and mixer 15 typically mixes the output of converter 13 with a signal proportional to cos(xcfx80t/2T).
Mixers 14 and 15 perform digital xe2x80x9cdown conversionxe2x80x9d (to the baseband) and generate the in-phase component (I) and the quadrature component (Q). Decimation filter 17A performs noise filtering and downsampling on the in-phase component (I). Decimation filter 18A performs noise filtering and downsampling on the quadrature component (Q). Typically, filter 17A is identical to filter 18A.
Digital filter 17 performs final channel selection filtering of the down-converted, in-phase component I (asserted at the output of filter 17A) including by lowpass filtering it with a bandwidth of width B (where xe2x80x9cBxe2x80x9d is typically slightly less than above-mentioned width xe2x80x9cAxe2x80x9d of filter 7""s pass band but much greater than 67 kHz), to produce a digitally filtered in-phase component. Digital filter 18 performs final channel selection filtering of the down-converted, quadrature component Q (asserted at the output of filter 18A), including by lowpass filtering it with a bandwidth of width B, to produce a digitally filtered quadrature component. Typically, filter 17 is identical to filter 18. Digital filters such as filters 17 and 18 that are used in wireless communication receivers typically perform filtering in addition to lowpass filtering, but we will refer to them herein as digital lowpass filters. Specifically, we will refer to each of filters 17 and 18 as a digital lowpass filter, and to filters 17 and 18 collectively as digital lowpass filter 19 (indicated in FIG. 1a).
FIG. 1b is a block diagram of a portion of another conventional receiver used in conventional GSM wireless communication systems. The GSM receiver of FIG. 1b is identical to that of FIG. 1a, except in that mixers 114 and 115, analog-to digital converters 113 and 116 (of FIG. 1b) replace analog-to digital converter 13, mixers 14 and 15, and decimation filters 17A and 18A (of FIG. 1a). Components of the FIG. 1b receiver that correspond to components of the FIG. 1a receiver are identically numbered in FIGS. 1a and 1b and the description of them will not be repeated.
In FIG. 1b, the amplified analog signal output from variable gain amplifier 12 undergoes mixing in mixers 114 and 115, to generate an in-phase component I and a quadrature component Q. Mixer 114 typically mixes the output of amplifier 12 with a signal proportional to sin(xcfx80/2T), where 1/T is the data rate, and mixer 115 typically mixes the output of amplifier 12 with a signal proportional to cos(xcfx80t/2T).
Then, the in-phase component (I) output from mixer 114 is digitized (with baseband sampling) in analog-to-digital converter 113, and the quadrature component (Q) output from mixer 115 is digitized (with baseband sampling) in analog-to-digital converter 116.
Digital filter 17 filters the digitized in-phase component I (asserted at the output of converter 113) including by lowpass filtering it with a bandwidth of width B (where xe2x80x9cBxe2x80x9d is typically slightly less than above-mentioned width xe2x80x9cAxe2x80x9d of filter 7""s pass band but much greater than 67 kHz), to produce a digitally filtered in-phase component. Digital filter 18 filters the digitized quadrature component Q (asserted at the output of converter 116), including by lowpass filtering it with a bandwidth of width B, to produce a digitally filtered quadrature component.
There exist other receivers which are similar to those of FIGS. 1a and 1b, but which employ only one intermediate frequency stage (or no intermediate frequency stage). Such receivers deliver a signal (or signals) to an analog-to-digital converter (e.g., to converter 13 of FIG. 1a) or to analog-to-digital converters (e.g., converters 113 and 116 of FIG. 1b).
In both the FIG. 1a and FIG. 1b implementations of conventional receivers, the digitally filtered in-phase and quadrature components output from filter 19 undergo further processing (by second stage receiver circuitry not shown). In performing such further processing, the receiver typically operates in a sequence of modes: a synchronization mode in which it processes an initial synchronization burst (sometimes referred to herein as a frequency correction burst) of one or both of the filtered in-phase and quadrature components to synchronize itself with the transmitting system; and then a normal mode in which it demodulates data (i.e., to extract the transmitted information content of the filtered in-phase and quadrature components). If the frequency correction burst cannot be identified during the synchronization mode (e.g., when the signal is too weak), the call cannot be established.
The pass bands of filters 7 and 19 are aligned with respect to the carrier center frequency (at least roughly), but that of filter 7 is usually slightly wider than that of filter 19 (and thus that of filter 17 or 18), so that digital lowpass filter 19 provides additional selectivity. However, the combined pass band of filters 7 and 19 is broader than necessary to accomplish the initial frequency synchronization operation. This is because the initial synchronization burst is a single frequency tone whose frequency is 67 kHz above the receiver""s channel frequency (i.e., 67 kHz above the center of the 200 kHz-wide band allocated to the receiver in the 925 MHz-to-960 MHz GSM range). Before synchronization is accomplished, the crystal oscillator circuitry in the receiver will not have the exact frequency of the tone burst, and will instead typically be too high or low by as much as about 10 ppm (10 kHz too high or low). Thus, the synchronization circuitry in the receiver typically must seek the tone burst in a 20 kHz bandwidth. This bandwidth is much narrower than the typical signal bandwidth which the receiver accommodates during post-synchronization processing.
Thus, it would be desirable to implement the FIG. 1a (or 1b) circuit with a variable combined pass band for filters 7 and 19: a narrow combined pass band during synchronization (to improve the signal to noise ratio and thus allow easier synchronization, so that a call can be initiated more rapidly and reliably); and a wider combined pass band for post-synchronization processing (once synchronization has been established).
More generally (in contexts other than GSM reception as described with reference to FIGS. 1a and 1b), the invention pertains to systems in which a received signal undergoes initial (passive) bandpass filtering, then analog-to-digital conversion, then digital lowpass (or bandpass) filtering to reduce noise, and then a sequence of processing operations are performed on the filtered digitized signal (at least a first one of the operations being performed on a narrower frequency band of the filtered digitized signal than are the other ones of the operations). In such systems, it would be desirable to narrow (or effectively narrow) the combined pass band of the passive bandpass and digital lowpass (or passive bandpass and digital bandpass) filters during the first one of the operations (for improved signal to noise ratio) and to widen (or effectively widen) their combined pass band during the other operations, preferably without varying any characteristic of the digital lowpass (or digital bandpass) filter.
However, until the present invention it had not been known how to implement such a variable combined pass band by modifying conventional circuitry (in a minor respect) to include simple bandwidth control circuitry, but without modifying any of the digital filters conventionally used in the conventional circuitry.
In preferred embodiments, the invention is a GSM receiver including a passive analog filter (a bandpass or lowpass filter) such as a passive channel select filter, an analog-to-digital converter, a digital filter (whose functions include a lowpass or bandpass filtering function), and bandwidth control circuitry (operable during a synchronization mode) configured to effectively narrow the combined pass band of the analog and digital filters (so as to reduce the bandwidth of noise that passes through both the analog and digital filters). In some preferred embodiments, the analog-to-digital converter includes sigma-delta conversion circuitry, digital down conversion circuitry, and a complex decimation filter. In other preferred embodiments, the analog-to-digital converter includes an analog down converter, and analog-to-digital conversion circuitry which samples the output of the analog down converter. Preferably, the bandwidth control circuitry receives the output of the analog-to-digital converter, and passes through such output (without changing it) to the digital filter during operating modes other than the synchronization mode. Also preferably, the output of the analog-to-digital converter is indicative of data, and the bandwidth control circuitry rotates the data in the complex domain (during the synchronization mode) before the data undergoes digital filtering. Frequency rotation of the data is equivalent to rotation of the digital filter pass band, so that (during synchronization) the combined pass band of the analog and digital filters is effectively narrowed but is still sufficiently wide to include the frequency of the frequency correction burst. By performing frequency rotation of the data in the complex (I-Q) domain, the invention accomplishes noise bandwidth reduction (during the synchronization mode) with very simple logic circuitry configured to perform simple logic operations. By implementing the bandwidth control circuitry as circuitry for performing frequency rotation on the data in accordance with the invention, conventional (unmodified) digital filters can be used.
Preferably, the bandwidth control circuitry is a data rotation circuit including two multiplexers, each coupled to receive the in-phase (I) and quadrature (Q) components of the data and negated versions thereof. At the output of each multiplexer, a different sequence of the inputs is asserted cyclically in response to a repeating sequence of control signal values. For example, one multiplexer asserts at its output (as the in-phase component of the rotated data) the repeating sequence I, Q, xe2x88x92I, and xe2x88x92Q in response to assertion (at twice the data rate) of a sequence of control signal values, while the other multiplexer asserts at its output (as the quadrature component of the rotated data) the repeating sequence Qxe2x88x92I, xe2x88x92Q, and I in response to the same sequence of control signal values. In a GSM receiver, the standard data rate is 270.8 kb/sec. The frequency rotation (on the data) by the multiplexers is equivalent to rotation of the digital filter pass band by (xe2x88x92270.8 kHz)/2=xe2x88x92135.4 kHz relative to a fixed pass band of the passive analog filter.
In another class of embodiments, the invention is a wireless communication system receiver (other than a GSM receiver) having a first stage including a passive analog filter (e.g., a passive channel select filter), an analog-to-digital converter, a digital filter, and selectively operable bandwidth control circuitry. The receiver also includes a second stage which receives the output of the first stage and performs a sequence of signal processing operations thereon, at least one of the signal processing operations being performed on a different frequency band of the first stage output than is another of such operations. The bandwidth control circuitry operates during at least one of the signal processing operations to reduce the effective combined pass band of the channel select and digital filters, thereby reducing the bandwidth of noise passed through to the second stage (during the at least one signal processing operation). Preferably, the output of the analog-to-digital converter is indicative of data, the bandwidth control circuitry is configured to rotate the data in the complex domain (during the at least one signal processing operation) before the data undergoes digital filtering, and at other times to pass through the data (without changing it) to the second stage.
Another aspect of the invention is a method for processing a signal that has propagated over a wireless communication link using a system having a first stage including an analog channel select filter (or other analog filter) and a digital filter (the analog and digital filters having a combined pass band) and a second stage, wherein the first stage provides a twice filtered signal (which has undergone filtering in both the analog filter and digital filter) to the second stage, and the second stage performs a sequence of operations on different portions of the twice filtered signal (e.g., a first operation on a portion of the twice filtered signal generated during a first time interval, and a second operation on a portion of the twice filtered signal generated during a later time interval). Each of the analog and digital filters is a low pass or bandpass filter, and the analog and digital filters together have a pass band (referred to as the xe2x80x9ccombined pass bandxe2x80x9d). In some embodiments, the method includes the steps of: (a) filtering a portion of the signal in the analog filter to generate a portion of a filtered signal, digitizing the portion of the filtered signal to produce a portion of a digitized filtered signal having in-phase and quadrature components, digitally processing the portion of the digitized filtered signal to generate a portion of a second signal, filtering the portion of the second signal in the digital filter to produce a portion of the twice filtered signal having a first noise bandwidth, and performing one of the operations in the second stage on said portion of the twice filtered signal; and (b) filtering a different portion of the signal in the analog filter to generate a different portion of the filtered signal, digitizing the different portion of the filtered signal to generate a different portion of the digitized filtered signal, filtering the different portion of the digitized filtered signal in the digital filter to produce a different portion of the twice filtered signal having a second noise bandwidth which is wider than the first noise bandwidth. Step (b) can be performed either before or after step (a), but the parameters of the analog filter are identical in steps (a) and (b) and the parameters of the digital filter are identical in steps (a) and (b). Preferably, the digital processing performed (on the digitized filtered signal) in step (a) is a data rotation operation.
In other embodiments, the method includes the steps of: (a) performing one of the operations in the second stage on a first portion of the twice filtered signal contemporaneously with filtering a portion of the signal in the analog filter to generate a filtered signal, digitizing said portion of the filtered signal to generate a portion of a digitized filtered signal, digitally processing the portion of the digitized filtered signal to generate a portion of a second filtered signal, and filtering the portion of the second filtered signal in the digital filter to produce a portion of the twice filtered signal having a first noise bandwidth; and (b) performing another one of the operations in the second stage on the twice filtered signal contemporaneously with filtering a different portion of the signal in the analog filter to generate a different portion of the filtered signal, digitizing the different portion of the filtered signal to generate a different portion of the digitized filtered signal, and filtering the different portion of the digitized filtered signal in the digital filter to produce a different portion of the twice filtered signal having a second noise bandwidth which is wider than the first noise bandwidth. Step (b) can be performed either before or after step (a), but the parameters of the analog filter are identical in steps (a) and (b) and the parameters of the digital filter are identical in steps (a) and (b).
In another class of embodiments, the method includes the steps of: (a) performing a first processing operation on a portion of the signal to generate a portion of a frequency down-converted signal having in-phase and quadrature components (this step can include immediate down conversion to a baseband frequency, or down conversion to an intermediate frequency); (b) filtering a portion of the frequency down-converted signal in the analog filter to generate a portion of a filtered signal, digitizing the portion of the filtered signal to generate a portion of a digitized filtered signal, digitally processing the portion of the digitized filtered signal to generate a portion of a second signal, and filtering the portion of the second signal in the digital filter to generate a portion of the twice filtered signal having a first noise bandwidth, and performing one of the operations on said portion of the twice filtered signal in the second stage; (c) performing the first processing operation on a different portion of the signal to generate a different portion of the frequency down-converted signal; and (d) filtering a different portion of the frequency down-converted signal in the analog filter to generate a different portion of the filtered signal, digitizing the different portion of the filtered signal to generate a different portion of the digitized filtered signal, and filtering the different portion of the digitized filtered signal in the digital filter to generate a different portion of the twice filtered signal having a second noise bandwidth which is wider than the first noise bandwidth, and performing another one of the operations on said different portion of the twice filtered signal in the second stage. In embodiments in which the frequency down-converted signal produced in step (a) has intermediate (rather than baseband) frequency, further down-conversion of the in-phase and quadrature components (to the baseband frequency) is performed during step (b) prior to generation of the second signal. In preferred embodiments, the first processing operation (of steps (a) and (c)) also accomplishes channel selection. Steps (a) and (b) can be performed either before or after steps (c) and (d), but the analog filter parameters are identical in steps (b) and (d) and the digital filter parameters are identical in steps (b) and (d).